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Materials for Electronic Products

Semiconductor fabrication



The properties of a material depend on its structure, which refers to the arrangement of its internal components.


Nucleus of an atom





Energy levels according to the principal quantum number (n)








Number of electrons for the first 4 principal quantum numbers








Valence electrons occupy the outermost shell of an atom and significantly affect its chemical reactivity








Pattern of valence electrons in the periodic table








Valence electrons determine electron mobility


Band gap theory explains the cause of free electrons.







Comparison of electrical conductivity at room temperature using a logarithmic scale.






Key discoveries:

Key discoveries for semiconductor development





Silicon

Silicon is naturally common
  • Second most adundant element on the planet.
  • Nearly a quarter of the planet crust by weight.
  • Element symbol is Si.
  • Atomic number is 14.
  • Group number is IV.

Properties of silicon
  • Semi-metallic.
  • Semiconductor.
  • Stable.
  • Can be heated to a high degree without losing material properties.
  • Conductivity of silicon is easy to control via doping (the process of adding atoms from another material to increase the conductivity of a pure semiconductor)
 Silicon structure





Inside a Philips Semiconductor Fab






Inside an Intel Semiconductor Fab






Semiconductor doping

Pure semiconductor
  • Valence shell is completely filled through covalent bonding with nearby atoms.
  • Doping is the process of adding tiny amounts of atoms from another material to a pure semiconductor to increase its conductivity.
  • Conductivity of silicon is easy to control via doping.

P-doping (top image)
  • Addition of atoms with less valence electrons in order to create a shortage of electrons in the crystal bonds.
  • Positive holes are formed that can transport current.
  • The dopant atoms are called acceptors because they accept electrons from the nearby atoms.

N-doping (bottom image)
  • Addition of atoms with extra valence electrons in order to create an excess of electrons in the crystal bonds.
  • Negative electrons are available that can transport current.
  • The dopant atoms are called donors because they donate electrons to nearby atoms.





Silicon isolation

Silicon needs to be isolated from naturally occuring silicon oxide materials

Additional processing is required to convert polycrystalline silicon to monocrystalline silicon known as an ingot

The Czochralski process is a common technique for single crystal growth

20% of wafer fabrication costs is for cleaning!

Silicon ingot




Two critical innovations

Monolithic production
  • All devices fabricated on same semiconductor material.
  • Jack Kilby

Metallisation step
  • Apply monolithic production technique to interconnects.
  • Robert Noyce

Planar processing
  • Combination of both ideas.
  • Processing steps depend on the geometric form of silicon wafers being a plane
  • Each fabrication process is performed on the entire plane of the substrate or layer

Fabrication processes could be categorised as:
  • Altering property of substrate or layer
  • Depositing a new layer
  • Removing an existing layer
 Planar processing
Source: (top) Rumelt, R. (2003). Semiconductor technology.
Los Angeles: University of California.
(bottom) International Roadmap for Semiconductors.
ITRS Press Conference, Dec 2004, 31.





Transistors + interconnects = Integrated circuits

Task specific IC
  • ASIC (application specific integrated circuit)
  • DSP (digital signal processor)

General purpose IC
  • FPGA (field programmable gate array)
  • microprocessors

IC integration scale
  • 1970s: Large scale integration
    • 10^3 - 10^4 devices/chip
  • 1980s: Very large scale integration
    • 10^4 - 10^6 devices/chip
  • 1990s: Ultra large scale integration
    • 10^6 - 10^8 devices/chip
  • 2000s: Giga scale integration
    • 10^9 - 10^10 devices/chip
 Xilinx Virtex FPGA
Source: Rabaey, J., Chandrakasan, A., Nikolic, B. (2003). Digital integrated circuits (2nd ed.)
New York: Prentice Hall.





Packaging levels:

Packaging levels





Fabrication processes

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 Semiconductor cross section
Source: International Roadmap for Semiconductors.
ITRS press conference, Dec 2004, 25.





Design complexity is expensive

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 Design complexity is expensive
Source: Rabaey, J., Chandrakasan, A., Nikolic, B. (2003). Digital integrated circuits (2nd ed.)
New York: Prentice Hall.





Fabrication is iterative

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 These steps repeat until all devices are fabricated on the wafer.





Lithography

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 
  • Lithography operates similar to a sophisticated (and expensive) reduction camera.
  • The condenser lens delivers light to the mask with specified energy and directionality.
  • The objective lens picks up some of the diffraction from the mask and projects an image on the wafer.
  • Early days of lithography used 456 nm wavelength light.
  • Lithography today is using 193 nm wavelength light.

Lithography
Source: H. Geng (Ed., 2005), Semiconductor manufacturing handbook.
Blacklick: McGraw-Hill.





Lithography in action

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 
Lithography in action
Source: Rabaey, J., Chandrakasan, A., Nikolic, B. (2003). Digital integrated circuits (2nd ed.)
New York: Prentice Hall.





Etching techniques

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 Chemical etching are isotropic processes which have the advantage of being low cost.
Wet chemical etching


Dry etching tend to be anisotropic processes. They are required for advanced IC fabrication.
Dry plasma etching

Source: H. Geng (Ed., 2005), Semiconductor manufacturing handbook.
Blacklick: McGraw-Hill.





Testing

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 IC fabrication use in-process test structures which are typically an integral part of production.





Packaging techniques

Front end processes
  • Design
  • Photomask development
  • Feature development
    • Oxidation layering
    • Lithography
    • Etching
      • Wet chemical
      • Dry plasma
    • Doping

Back end processes
  • Metallisation
    • Lithography
  • Testing
  • Packaging
 Packaging reconciles a wide range of requirements:
  • Electrical: Minimal leaks.
  • Mechanical: Reliable and robust.
  • Thermal: Effective heat removal.
  • Economical: Cheap for production and distribution.

Wire bonding

Source: Rabaey, J., Chandrakasan, A., Nikolic, B. (2003). Digital integrated circuits (2nd ed.)
New York: Prentice Hall.





Future of fabrication

Today
  • Integrated circuits
    • Thin-film fabrication (single dimension nanoscale layers)
    • Electron beam lithography fabrication
    • Solid state memory devices (flash/USB)
  • Microelectromechanical systems (MEMS)
    • Surface micromachining
    • Flip chip assembly
    • Nanoscale sensors

Tomorrow
  • Carbon nanotubes
    • Transistors
    • Logic structures
  • Molecular electronics
    • Transistors
    • Switches
    • Interconnects
    • Memory
  • Plastic-based electronics

 
Microelectromechanical systems (MEMS)

Source: Micromachines image gallery. (n.d.). Retrieved 24 Apr 2005
from http://mems.sandia.gov/scripts/images.asp.





Future of fabrication

Today
  • Integrated circuits
    • Thin-film fabrication (single dimension nanoscale layers)
    • Electron beam lithography fabrication
    • Solid state memory devices (flash/USB)
  • Microelectromechanical systems (MEMS)
    • Surface micromachining
    • Flip chip assembly
    • Nanoscale sensors

Tomorrow
  • Carbon nanotubes
    • Transistors
    • Logic structures
  • Molecular electronics
    • Transistors
    • Switches
    • Interconnects
    • Memory
  • Plastic-based electronics

 Stretchable Silicon

Stretchable silicon

Source: Greene, K. (2006, March/April). Stretchable silicon. Technology Review, 70.




Links to more information about the use of ceramics as a conductor: